Title: Optimization of the δ-Doped Layer Concentration in P-HFETs at Medium/High Temperatures
Authors: González, A. Hernández, J. García, J. del Pino, J.R: Sendra y A. Núñez.
Conference name: XIV Design of Integrated Circuits and Systems Conference
The use of 5-doping in HFET processes has made possible the development of transistor circuits and logic gates, for very high frequency/speed or low power applications, that rely on fast quantum well conduction. In these cases the effect of the target operating temperature range is critical. This range depends on the transistor and circuit activity, the packaging technique, and the specified external operating conditions. The temperature strongly affects the device ability to confine the current flow into the quantum well channel. In this paper the effect of temperature and 5-doping concentration on the performance of the device is investigated by means of simulated experiments. The results are analytically and qualitatively discussed, showing how to fine-tune the 5-doping concentration in order to optimize the P-HFET behaviour for medium and high temperature conditions.