Conference papers

DC self-heating in GaN on Si MOS-HEMTs
Workshop on Compound Semiconductor Devices and Integrated Circuits held in Europe. WOCSDICE 2017
Las Palmas de Gran Canaria, España
Instituto Universitario de Microeelctrónica Aplicada. Universidad de Las Palmas de Gran Canaria
R. Rodríguez, B. González, J. García and A. Nunez

DC characteristics with substrate temperature for GaN on Si MOS-HEMTs
11th Spanish Conference on Electron Device
Barcelona, España 2017
Universidad de Barcelona
Raúl Rodríguez del Rosario; Benito González Pérez; Javier García García; Aurelio Vega Martínez

DC SHEs on GaN HEMTs varying substrate material
X Conferencia de Dispositivos Electrónicos CDE
Aranjuez, España 2015
Universidad Rey Juan Carlos
Raúl Rodríguez del Rosario; Benito González Pérez; Javier García García; Antonio Nunez Ordonez; Fetene Mulugeta Yigletu; Benjamín Íñiguez; José M. Tirado.

Numerical Simulation and Compact Physical Modeling of AlGaN/GaN Power HEMTs
Accounting for Mitigation of SHE Degradation by Using Engineered Substrate Materials
The International Workshop on Nitride Semiconductors (IWN)
Wrocław, Polonia 2014
Institute of High Pressure Physics » Unipress» PAS, University of Wrocław, Wrocław
Research Centre EIT+, Institute of Low Temperatures and Structural Research PAS, Wrocław
Wrocław, Polonia
Raúl Rodríguez del Rosario; Benito González Pérez; Javier García García; F. Mulugeta; José María Tirado; Benjamín Íñiguez

Integrated varactor modeling for a PN doughnut structure
XXVIII Design of Integrated Circuits and Systems Conference DCIS2013
San Sebastián, País Vasco, España 2013
Universidad de Navarra
Margarita Marrero Martín; Javier García García; Benito González Pérez; Raúl Rodríguez del Rosario; Antono Hernández Ballester.
«Proceeding of XXVIII Design of Integrated Circuits and Systems Conference DCIS2013».

Study of Rectifiers for RFID tags using SOI
XXVIII Design of Integrated Circuits and Systems Conference DCIS2013
San Sebastián, País Vasco, España 2013
Universidad de Navarra
Raúl Rodríguez del Rosario; Benito González Pérez; Javier García García; Margarita Marrero Martín; Antono Hernández Ballester.
«Proceeding of XXVIII Design of Integrated Circuits and Systems Conference DCIS2013».

Study of RFID with SOI technology for UWB
IX Conferencia de Dispositivos Electrónicos CDE
Valladolid, España 2013
Universidad de Valladolid
Raúl Rodríguez del Rosario; Benito González Pérez; Javier García García; Margarita Marrero Martín; Antonio Hernández Ballester.

Rectennas design using DG-MOSFETs
SPIE Microtechnologies 2013 (VLSI Circuits and Systems)
Grenoble, Francia 2013
Raúl Rodríguez del Rosario; benito González Pérez; Javier García García; Margarita Marrero Martín; Antonio Hernández Ballester.
«SPIE Microtechnologies 2013 (VLSI Circuits and Systems)».

Circuit models for PN integrated varactors
VIII Conferencia de Dispositivos Electrónicos (Nacional)
Palma de Mallorca, España, 2011
M. Marrero; J. García; B. González; A. Hernández.
«VIII Conferencia de Dispositivos Electrónicos

Coupled varactor based on PN junction and accumulation MOS for RF applications
VIII Conferencia de Dispositivos Electrónicos (Nacional)
Palma de Mallorca, España, 2011
J. García; M. Marrero; B. González; I. Aldea; A. Hernández. «VIII Conferencia de Dispositivos Electrónicos

Effect of separation and depth of N+ diffusions in the quality factor and tuning range of PN varactors
SPIE Microtechnologies 2011 (VLSI Circuits and Systems)
Prague, República Checa 2011
Margarita Marrero Martín; Tomasz Szydzik; Benito González Pérez; Javier García García; Antonio Hernández Ballester.
«Proceeding of SPIE Microtechnologies 2011 (VLSI Circuits and Systems)».

Integrated PN Varactors and their Application in Wide Range VCOs
XXV Conference on Design of Circuits and Integrated Systems, DCIS 2010.
Lanzarote, Spain. 2010
M. Marrero; B. González; J. García; S. L. Khemchandani; A. Hernández; J. del Pino. «XXV Conference on Design of Circuits and Integrated Systems, DCIS 2010». 2010.

Capacitance estimation of PN varactors based on unit cells
VII Conferencia de Dispositivos Electrónicos (Nacional)
Santiago de Compostela, 2009
M. Marrero; B. González; J. García; A. Hernández.
«VII Conferencia de Dispositivos Electrónicos

Equivalent circuit model for capacitances in PN varactors with buried layer
VII Conferencia de Dispositivos Electrónicos (Nacional)
Santiago de Compostela, 2009
M. Marrero; J. García; B. González; A. Hernández.
«VII Conferencia de Dispositivos Electrónicos

A physical-based method for parameter extraction of on-chip spiral inductor
VI Conferencia de Dispositivos Electrónicos (Nacional)
San Lorenzo de El Escorial, 2007
A. Goñi; J. del Pino; J. García; B. González; S. L. Khemchandani; A. Hernández.
«VI Conferencia de Dispositivos Electrónicos (Nacional).». 2007.

A study of staked and miniature three-dimensional inductor performance for RF IC design
SPIE – The International Society for Optical Engineering’s III International
Symposium on Microtechnologies for the New Millennium Design (VLSI Circuits and Systems Conference). Maspalomas, Las Palmas, España. 2007
A. Goñi; J. del Pino; S. L. Khemchandani; J. García; B. González; A. Hernández. «SPIE – The International
Society for Optical Engineering’s III International Symposium on Microtechnologies for the New Millennium
Design (VLSI Circuits and Systems Conference). Maspalomas, Las Palmas, España. 2007». 2007.

Analysis of PN Integrated Varactors with N+ Buried Layer varying P+ diffusions contour for RF Applications
XXII Conference on Design of Circuits and Integrated Systems, DCIS 2007. Sevilla, España. 2007
J. García; B. González; M. Marrero; I. Aldea; J. del Pino; A. Hernández.
«XXII Conference on Design of Circuits and Integrated Systems, DCIS 2007. Sevilla, España. 2007». 2007.

Influence of gate geometry in integrated MOS varactors on accumulation mode for RF
VI Conferencia de Dispositivos Electrónicos
San Lorenzo de El Escorial, 2007
E. Amselem; B. González; J. García; I. Aldea; M. Marrero; A. Goñi; J. del Pino; S. L. Khemchandani; A. Hernández.
«VI Conferencia de Dispositivos Electrónicos». 2007.

Influence of the diffusion geometry on PN Integrated Varactors
SPIE – The International Society for Optical Engineering’s III International
Symposium on Microtechnologies for the New Millennium Design (VLSI Circuits and Systems Conference). Maspalomas, Las Palmas, España. 2007
J. García; B. González; M. Marrero; I. Aldea; J. del Pino; A. Hernández. «SPIE – The International Society for Optical Engineering’s III International Symposium on Microtechnologies for the New Millennium Design (VLSI Circuits and Systems Conference). Maspalomas, Las Palmas, España. 2007». 2007.

A Method to Build-up an Integrated Inductor Library
XX Design of Integrated Circuits and Systems Conference
Lisboa, Portugal, 2005
O. Medina; J. del Pino; A. Goñi; S. L. Khemchandani; J. García; A. Hernández.
«XX Design of Integrated Circuits and Systems Conference.». 2005.

A Synthesizer for WLAN with a Fully Integrated VCO in 0,35 μm SiGe Technology
XX Design of Integrated Circuits and Systems Conference
Lisboa, Portugal, 2005
S. L. Khemchandani; A. Goñi; J. del Pino; B. González; J. García; A. Hernández.
«XX Design of Integrated Circuits and Systems Conference.». 2005.

Analytical model for PN cross varactors
V Conferencia de Dispositivos Electrónicos (Nacional)
Tarragona, España, 2005
J. A. Pérez; B. González; J. García; J. del Pino; S. L. Khemchandani; A. Hernández. «V Conferencia de Dispositivos Electrónicos». 2005.

DC Modeling of PN integrated cross varactors
SPIE – The International Society for Optical Engineering’s International
Symposium on Microtechnologies for the New Millennium Design (VLSI Circuits and Systems Conference) Sevilla, España, 2005
B. González; J. A. Pérez; S. L. Khemchandani; A. Goñi; J. del Pino; J. García. «SPIE – The International Society for Optical Engineering’s II International Symposium on Microtechnologies for the New Millennium Design (VLSI Circuits and Systems Conference) «. 2005.

Design and modelling of an on silicon spiral inductors library using improved EM simulations
SPIE – The International Society for Optical Engineering’s International
Symposium on Microtechnologies for the New Millennium Design (VLSI Circuits and Systems Conference) Sevilla, España, 2005
A. Goñi; S. L. Khemchandani; J. del Pino; J. García; B. González; A. Hernández. «SPIE – The International Society for Optical Engineering’s II International Symposium on Microtechnologies for the New Millennium Design (VLSI Circuits and Systems Conference)». 2005.

Integrated MOS Varactors in Accumulation Mode for RF Applications
XIX Design of Integrated Circuits and Systems Conference
Bordeaux, Francia, 2004
B. González; J. García; I. Gutierrez; N. Sainz; M. Marrero; A. Goñi; A. Hernández.
«XIX Design of Integrated Circuits and Systems Conference (Internacional». 2004.

A Simplified Physical Model for PN Junction Integrated Varactors
XVIII Design of Integrated Circuits and Systems Conference
Ciudad Real, España, 2003
I. Gutiérrez; N. Sainz; J. García; E. Hernández; J. del Pino; B. González; J. Meléndez. «XVIII Design of Integrated Circuits and Systems Conference.». 2003.

A Software for Varactors Simulation Based on Finite Difference Approximation
IV Conferencia de Dispositivos Electrónicos
Barcelona, España, 2003
N. Sainz; I. Gutiérrez; J. Legarda; J. García; J. de Nó.
«IV Conferencia de Dispositivos Electrónicos». 2003.

DC – Extrinsic Model for AlGaAs/InGaAs/GaAs HFETs
12th European Workshop on Heterostructure Technology, MonD6
Segovia, España, 2003
B. González; A. Hernández; J. García; J. del Pino; J. R. Sendra; A. Núñez. «12th European Workshop on Heterostructure Technology, MonD6». 2003.

Empirical model of the metal losses in integrated inductors
SPIE – The International Society for Optical Engineering’s I International Symposium on Microtechnologies for the New Millennium Design (VLSI Circuits and Systems Conference)
(Internacional) Las Palmas, España, 2003
J. del Pino; J. García; B. González; J. R. Sendra; A. Hernández; A. García-Alonso; A. Núñez. «SPIE – The International Society for Optical Engineering’s I International Symposium on Microtechnologies for the New Millennium Design (VLSI Circuits and Systems Conference)». 2003.

Integrated PN cross varactors for RF applications
XVIII Design of Integrated Circuits and Systems Conference
Ciudad Real, España, 2003
J. García; B. González; J. del Pino; I. Gutiérrez; N. Sainz; J. R. Sendra; A. Hernández; A. Núñez.
«XVIII Design of Integrated Circuits and Systems Conference.». 2003.

Interdigitated varactors for RFIC applications at different standard frequencies
IV Conferencia de Dispositivos Electrónicos. Barcelona, España, 2003
I. Gutiérrez; J. García; E. Hernández; J. R. Sendra; J del Pino; J. Meléndez.
«IV Conferencia de Dispositivos Electrónicos». 2003.

PN Junction Integrated Varactors for RF Applications at Different Standard Frequencies
IEEE Conference IV Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Garmisch, Alemania, 2003
I. Gutiérrez; J. García; N. Sainz; J. R. Sendra; J. de Nó; A. Hernández.
«IEEE Conference IV Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF03». 2003.

PN Junction Integrated Varactors with Cross Structure
IV Conferencia de Dispositivos Electrónicos. Barcelona, España, 2003
J. García; N. Sainz; B. González; J. Presa; A. Hernández.
«IV Conferencia de Dispositivos Electrónicos».2003.

Temperature extrinsic modeling in HFETs
IV Conferencia de Dispositivos Electrónicos. Barcelona, España, 2003
B. González; A. Hernández; J. García; J. del Pino; J. R. Sendra; A. Núnez.
«IV Conferencia de Dispositivos Electrónicos». 2003.

Temperature in HFETs when operating in DC
SPIE – The International Society for Optical Engineering’s I International Symposium on Microtechnologies for the New Millennium Design (VLSI Circuits and Systems Conference)
Las Palmas, España, 2003
B. González; A. Hernández; J. García; J. del Pino; J. R. Sendra; A. Núñez.
«SPIE – The International Society for Optical Engineering’s I International Symposium on Microtechnologies for the New Millennium Design (VLSI Circuits and Systems Conference)». 2003.

The Impact of Integrated Inductors on Low Noise Amplifiers
XVIII Design of Integrated Circuits and Systems Conference
Ciudad Real, España, 2003
J. del Pino; S. L. Khemchandani; A. Hernández; J. R. Sendra; J. García; B. González; A. Núñez.
«XVIII Design of Integrated Circuits and Systems Conference.». 2003.

Automatic Timing Model Development for CMOS Logic Circuits
XVII Design of Integrated Circuits and Systems Conference. Santander, España, 2002
J. García; A. Hernández; J. del Pino; B. González; J. R. Sendra; A. Núñez.
«XVII Design of Integrated Circuits and Systems Conference». 2002.

Discrimination of pigmented skin lesions by VIS-NIR spectrocopy: preliminary study
Biophotonics 2002 Heraklion, Grecia 2002
M. Cordo; J. R. Sendra; S.M. López-Silva; J. García; A. Viera.
«Proc. Biophotonics 2002». 2002.

Layout Constraints for RF Integrated Inductors on Silicon
XVII Design of Integrated Circuits and Systems Conference. Santander, España, 2002
J. del Pino; J. García; A. Hernández; B. González; J. R. Sendra; A. Núñez.
«XVII Design of Integrated Circuits and Systems Conference». 2002.

On Silicon Integrated Inductor Library Design for Wireless Applications
XXVIII Conference of the IEEE Industrial Electronics Society (IECON’02) Sevilla, España, 2002
J. del Pino; J. R. Sendra; A. Hernández; J. García; B. González; J. Aguilera; J. Hernández; J. de Nó; A.Núñez.
«XXVIII Conference of the IEEE Industrial Electronics Society (IECON’02)». 2002.

Temperature Behavior Modeling of Intrinsic InGaAs PHFET
XVII Design of Integrated Circuits and Systems Conference. Santander, España, 2002
B. González; J. García; A. Hernández; J. del Pino; J. R. Sendra; A. Núñez.
«XVII Design of Integrated Circuits and Systems Conference». 2002.

A 1.575 GHz SiGe Low Noise Amplifiers for GPS Applications
XVI Design Circuits and Integrated Systems Conference Oporto, Portugal 2001
J. del Pino; S. L. Khemchandani; A. Hernández; J. R. Sendra; J. García; B. González; A. Núñez.
«XVI Design Circuits and Integrated Systems Conference,». pp. 479 – 484. 2001.

Modelling and Automatic Generation Tool for Integrated Inductors in CMOS Technology
XVI Design Circuits and Integrated Systems Conference Oporto, Portugal 2001
J. del Pino; J. R. Sendra; A. Hernández; S. L. Khemchandani; J. Aguilera; B. González; J. García; A. Núñez.
«XVI Design Circuits and Integrated Systems Conference,». pp. 378 – 383. 2001.

SiDSen: A program to simulate delays based on sensitivity analysis model
XVI Design Circuits and Integrated Systems Conference Oporto, Portugal 2001
J. García; J. Pulido; A. Hernández; J. del Pino; B. González; J. R. Sendra; A. Núñez. «XVI Design Circuits and Integrated Systems Conference,». pp. 192 – 197. 2001.

Fotopletismografía y oximetría de pulso mediante espectroscopia VIS-NIR
Jornadas de Ingeniería Médica en Canarias Las Palmas de Gran Canaria, España 2000
S. M. López; J. R. Sendra; J. del Pino; J. García; B. González; A. Hernández. «Jornadas de Ingeniería Médica en Canarias». 2000

Oximetría in vivo mediante espectroscopia óptica
Jornadas de Ingeniería Médica en Canarias Las Palmas de Gran Canaria, España 2000
S. M. López; J. R. Sendra; J. del Pino; J. García; B. González; A. Hernández. «Jornadas de Ingeniería Médica en Canarias». 2000.

Optimization of the delta-Doped Layer Concentration in P-HFETs at Medium/High Temperatures
XIII Design of Integrated Circuits and Systems Conference Palma de Mallorca, España 1999
B. González; A. Hernández; J. García; J. del Pino; J. R. Sendra; A. Núñez.
«Proceedings of the XIII Design of Integrated Circuits and Systems Conference, págs. 433-437». 1999.

Application of Sensitivity Analysis in Modelling Power and Delay for HFET DCFL Circuits
VIII International Symposium of Power and Timing Modelling Optimization and Simulation Lyngby, Dinamarca 1998
J. García; J. del Pino; B. González; A. Hernández; A. Núñez.
«Proceedings of the VIII International Symposium of Power and Timing Modelling Optimization and Simulation, págs. 51-60». 1998.

Efficient Transistor Count Reduction for a Low Power GaAs A/D Converter
XIII Design Circuits and Integrated Systems Conference. Madrid, 1998
B. González; D. Abbot; Al-Sarawi; A. Hernández; J. López; J. García. «Proceedings of the XIII Design Circuits and Integrated Systems Conference, 96-100». 1998.

Estimation of Power Consumption Based on Sensitivity Analysis for DCFL with HFET’s
XIII Design Circuits and Integrated Systems Conference Madrid,1998
J. García; A. Hernández; J. del Pino; B. González; A. Núñez.
«Proceedings of the XIII Design Circuits and Integrated Systems Conference, 96-100». 1998.

Influence of temperature and doped layer concentration on P-HFETs
International Symposium on IC Technology, Systems & Applications.Singapore, 1997
B. González; A. Hernández; J. García; A. Núñez.
«Proceedings of the XII Design of Circuits and Integrated Systems Conference, págs. 459-464». 1997.

Performance Analysis and Propagation Delay Time Estimation of Logic Families with HBTs
VII International Symposium of Power and Timing Modelling Optimization and Simulation. Lovain-la-Neuve, Bélgica 1997
J. del Pino; A. Hernández; B. González; J. García; A. Núñez.
«Proceedings of the VII International Symposium of Power and Timing Modelling Optimization and Simulation, págs. 323-332». 1997.

Performance Analysis and Propagation Delay Time Estimation of Logic Families with HBTs
XII Design of Circuits and Integrated Systems Conference Sevilla, España 1997
J. del Pino; A. Hernández; B. González; J. García; A. Núñez.
«Proceedings of the XII Design of Circuits and Integrated Systems Conference, págs. 459-464». 1997.

Timing Analysis Model Based on Sensitivity for DCFL Family with HFET’s
XII Design of Circuits and Integrated Systems Conference Sevilla, España 1997
J. García; A. Hernández; B. González; J. del Pino; A. Núñez.
«Proceedings of the XII Design of Circuits and Integrated Systems Conference, págs. 453-457,». 1997.