Publications

• «An Analytical Scalable Lumped-Element Model for GaN on Si Inductors»
  M. S. M. Montesdeoca, S. M. Angulo, D. M. Duarte, J. del Pino, J. García and S. L. Khemchandani
  IEEE Access, vol. 8, pp. 52863-52871, 2020, doi: 10.1109/ACCESS.2020.2980926
• «DC Gate Leakage Current Model Accounting for Trapping Effects in AlGaN/GaN HEMTs»
  R. Rodríguez; B. González; J. García; G. Toulon; F. Morancho A. Núñez
  Electronics MDPI. Año 2018 https://doi.org/10.3390/electronics7100210
• «Electrothermal DC characterization of GaN on Si MOS-HEMTs»
  R. Rodríguez; B. González; J. García; A. Núñez
  Solid-State Electronics. Elsevier. Año 2017 https://doi.org/10.1016/j.sse.2017.08.002
•  «Large-Signal DG-MOSFET Modelling for RFID Rectification»
  R. Rodríguez; B. González; J. García; A. Lázaro; B. Iñiguez; A. Hernández
  Advances in Condensed Matter Physics. 2016, Hindawi Publishing Corporation, Volume 2016 (2016), Article ID 8017139 http://dx.doi.org/10.1155/2016/8017139

• “N-well resistance modelling in Q-factor of doughnut-shaped PN varactors”
  M. Marrero-Martín; B. González, J. García, and A. Hernández.
  Solid-State Electronics. Elsevier. 103, pp.104-109. Año 2015

• Numerical simulation and compact modelling of AlGaN/GaN HEMTs with mitigation of self‐heating effects by substrate materials.
  Rodríguez, R., González, B., García, J., Yigletu, F. M., Tirado, J. M., Iñiguez, B., & Nunez, A
  physica status solidi (a), 212(5), 1130-1136. 2015

• «Wide range fully integrated VCO with new cells-based varactor»
  M. Marrero; B. González; J. García; S. L. Khemchandani; A. Hernández; J. del Pino
  International Journal of Electronics. 99 – 8, pp. 1165 – 1178. Reino Unido 2012.

• “Capacitive model for integrated PN varactors of cells with N⁺ buried layer”
  M. Marrero-Martín, J. García, B. González and A. Hernández
  International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, vol. 23, pp. 367-378, 2010 Published online in Wiley InterScience (www.interscience.wiley.com). DOI: 10.1002/jnm.751

• “Caracterización eléctrica de transistores basados en nitruros”
  Benito González Pérez, Francisco Gámiz Pérez, José María Tirado Martín y Javier García García
  Vector Plus, vol. 29, pp. 31-39, 2007

• “Reliability Verification in a Measurement System of Integrated Varactors for RF Applications”
  I. Gutierrez, J. Melendez, J. Garcia, I. Adin, G. Bistue, J. De No.
  Latin America Transactions, IEEE (Revista IEEE America Latina) Vol. 3, Issue 4, pp: 15-20 Oct. 2005

• “Inductores integrados planos sobre tecnologías de Silicio”
  J. del Pino, J. R. Sendra, A. Hernández, B. González, J. García, S. L. Khemchandani, and A. Hernandez
  Vector Plus, vol. 24, pp. 14-23, 2004

• «Characterization of extrinsic resistances in temperature behaviour modelling of InGaAs MODFET’s«
  B González, A Hernández, J García, J del Pino, J R Sendra and A Nunez
  Semiconductor Science and Technology, Volumen: 19, pp. 648-654, 2004

• “Integrated Inductors Modeling for Library Development and Layout Generation”
  J. del Pino, J. R. Sendra, A. Hernández, B. González, J. García, A. García-Alonso and A. Núñez,
  International Journal of Analog Integrated Circuits and Signal Processing vol. 35, pp. 121-132. Kluwer Academic Publishers 2003

• “Models and Tools for CMOS Integrated Inductors”
  J. del Pino, J. R. Sendra, A. Hernández, S. L. Khemchandani, J. Aguilera, B. González, J. García and A. Nunez,
  International Journal of Analog Integrated Circuits and Signal Processing vol. 33, pp. 171-178. Kluwer Academic Publishers 2002

• “Inductores integrados planos sobre tecnologías de Silicio”
  B. González, J. García, A. Hernández, J. del Pino, and J. R. Sendra,
  Vector Plus, vol. 19, pp. 14-23, 2002

• «Power model for DCFL family»
  J. García, A. Hernández, J. del Pino, J. R. Sendra, B. González, and A. Nunez,
  IEE Electronics Letters. Volumen 38, pp. 13-14, 2002

• «Optimization of the d-doped layer in P-HFETs at medium/high temperatures»
  B. González, A. Hernández, J. García, J. del Pino, J. R. Sendra and A. Nunez
  Semiconductors Science and Technology. Volumen: 15, pp. 19- 23, 2000